Share and Export
Share and Export
Wu, Fangzhou, Palomo-Navarro, Ãlvaro and Villing, Rudi (2015) FGPA Realization of GDFT-FB Based Channelizers. In: 26th Irish Signals and Systems Conference (ISSC), 2015. IEEE, pp. 1-6. ISBN 9781467369749
Preview
RV-FPGA-Realization.pdf
Download (317kB) | Preview
Abstract
Efficient channelization in flexible, reconfigurable communications systems is an ongoing challenge. Our previous work has shown that designs based on the DFT modulated Filter Bank (DFT-FB) and its extension, the Generalized DFT modulated Filter Bank (GDFT-FB) appear to have good computational efficiency and to simplify filter bank design. I n this work we examine the design and implementation of the fundamental DFT-FB and GDFT-FB on an FPGA in both critically sampled and oversampled variants. Solutions to various design issues are presented and the FPGA resource usage associated with a concrete example is presented.
| Item Type: | Book Section |
|---|---|
| Keywords: | FPGA; GDFT; filterbank; oversampled; |
| Academic Unit: | Faculty of Science and Engineering > Electronic Engineering |
| Item ID: | 7080 |
| Identification Number: | 10.1109/ISSC.2015.7163773 |
| Depositing User: | Rudi Villing |
| Date Deposited: | 25 Apr 2016 16:26 |
| Publisher: | IEEE |
| Refereed: | Yes |
| Related URLs: | |
| URI: | https://mu.eprints-hosting.org/id/eprint/7080 |
| Use Licence: | This item is available under a Creative Commons Attribution Non Commercial Share Alike Licence (CC BY-NC-SA). Details of this licence are available here |
Repository Staff Only (login required)
- Item control page
Downloads
Downloads per month over past year
