Zhang, Guoyan, Sánchez Mora, Magdalena and Farrell, Ronan (2006) A Built-In-Test Circuit for Functional Verification & PVT Variations Monitoring of CMOS RF Circuits. In: UNSPECIFIED.
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Abstract
Built-In-Test (BIT) for Radio Frequency (RF) integrated circuits can reduce
the testing cost, especially with the increase of integration level and operating frequency.
A fully integrated CMOS BIT detection circuit is presented in this work. This BIT
detection circuit is rectifier-based and low threshold voltage diode-connected MOS
transistor with substrate positively-biased is used to improve the detecting sensitivity.
As an example, a 2.4GHz LNA is used, the high frequency small signal gain is extracted
and the gain fluctuation due to Process, supply Voltage and Temperature (PVT)
variations is also investigated. The simulation results show that this BIT detection
circuit can realize on-chip functional verification of RF circuits and also monitor the
influence of PVT variations on the performance of the circuit without affecting the high
frequency performance of the measured RF circuits.
Item Type: | Conference or Workshop Item (Paper) |
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Additional Information: | This paper is a postprint of a paper submitted to and accepted for publicatin in (journal/conference) and is subject to Institution of Engineering and Technology Copyright. The copy of record is available at IET Digital Library |
Academic Unit: | Faculty of Science and Engineering > Electronic Engineering |
Item ID: | 603 |
Depositing User: | Ronan Farrell |
Date Deposited: | 23 Sep 2008 |
Publisher: | Institution of Engineering and Technology |
Refereed: | Yes |
Related URLs: | |
URI: | https://mu.eprints-hosting.org/id/eprint/603 |
Use Licence: | This item is available under a Creative Commons Attribution Non Commercial Share Alike Licence (CC BY-NC-SA). Details of this licence are available here |
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