The implementation of a viable statistical circuit design methodology requiring detailed knowledge of the vari- abilities of, and correlations among, the circuit simulator model parameters utilized by designers, and the determination of the important relationships between these CAD model parameter variabilities and the process variabilities causing them is pre- sented. This work addresses the above requirements by detailing a new framework which was adopted for a 2-pm CMOS technol- ogy to enable realistic statistical circuit performance prediction prior to manufacture. Issues relating to MOSFET modeling, the derivation of fast “direct” parameter extraction methodologies suitable for rapid parameter generation, the employment of mul- tivariate statistical techniques to analyze statistical parametric data, and the ling of the CAD model parameter variations to variabilities in process quantities are discussed. In this approach the correlated set of model parameters is reduced to a smaller and more manageable set of uncorrelated process-related factors. The ensuing construction and validation of realistic statistical circuit performance procedures is also discussed. Comparisons between measured and simulated variabilities of device characteristics is utilized to demonstrate the accuracy of the techniques described. The advantages of the proposed approach over more traditional “worst case” design methodologies are demonstrated.